This notebook demonstrates how to use Clocks
class to control the PL clocks.
By default, there are at most 4 PL clocks enabled in the system. They all can be reprogrammed to valid clock rates.
Whenever the overlay is downloaded, the required clocks will also be configured.
References:
https://www.xilinx.com/support/documentation/user_guides/ug585-Zynq-7000-TRM.pdf
The following example show all the current clock rates on the board.
In [1]:
from pynq import Clocks
from pynq import PL, Overlay
print(f'CPU: {Clocks.cpu_mhz:.6f}MHz')
print(f'FCLK0: {Clocks.fclk0_mhz:.6f}MHz')
print(f'FCLK1: {Clocks.fclk1_mhz:.6f}MHz')
print(f'FCLK2: {Clocks.fclk2_mhz:.6f}MHz')
print(f'FCLK3: {Clocks.fclk3_mhz:.6f}MHz')
In [2]:
Clocks.fclk0_mhz = 27.123456
Clocks.fclk1_mhz = 31.436546
Clocks.fclk2_mhz = 14.597643
Clocks.fclk3_mhz = 0.251954
print(f'CPU: {Clocks.cpu_mhz:.6f}MHz')
print(f'FCLK0: {Clocks.fclk0_mhz:.6f}MHz')
print(f'FCLK1: {Clocks.fclk1_mhz:.6f}MHz')
print(f'FCLK2: {Clocks.fclk2_mhz:.6f}MHz')
print(f'FCLK3: {Clocks.fclk3_mhz:.6f}MHz')
In [3]:
_ = Overlay(PL.bitfile_name)
print(f'FCLK0: {Clocks.fclk0_mhz:.6f}MHz')
print(f'FCLK1: {Clocks.fclk1_mhz:.6f}MHz')
print(f'FCLK2: {Clocks.fclk2_mhz:.6f}MHz')
print(f'FCLK3: {Clocks.fclk3_mhz:.6f}MHz')