PS Clock Control

This notebook demonstrates how to use Clocks class to control the PL clocks.

By default, there are at most 4 PL clocks enabled in the system. They all can be reprogrammed to valid clock rates.

Whenever the overlay is downloaded, the required clocks will also be configured.

References:

https://www.xilinx.com/support/documentation/user_guides/ug585-Zynq-7000-TRM.pdf



In [1]:

    
import os, warnings
from pynq import PL
from pynq import Overlay

if not os.path.exists(PL.bitfile_name):
    warnings.warn('There is no overlay loaded after boot.', UserWarning)

Note: If you see a warning message in the above cell, it means that no overlay has been loaded after boot, hence the PL server is not aware of the current status of the PL. In that case you won't be able to run this notebook until you manually load an overlay at least once using:

from pynq import Overlay
ol = Overlay('your_overlay.bit')

If you do not see any warning message, you can safely proceed.

Show All Clocks

The following example shows all the current clock rates on the board.



In [2]:

    
from pynq import Clocks

print(f'CPU:   {Clocks.cpu_mhz:.6f}MHz')
print(f'FCLK0: {Clocks.fclk0_mhz:.6f}MHz')
print(f'FCLK1: {Clocks.fclk1_mhz:.6f}MHz')
print(f'FCLK2: {Clocks.fclk2_mhz:.6f}MHz')
print(f'FCLK3: {Clocks.fclk3_mhz:.6f}MHz')









    



CPU:   650.000000MHz
FCLK0: 100.000000MHz
FCLK1: 142.857143MHz
FCLK2: 200.000000MHz
FCLK3: 100.000000MHz

Set Clock Rates

The easiest way is to set the attributes directly. Random clock rates are used in the following examples; the clock manager will set the clock rates with best effort.

If the desired frequency and the closest possible clock rate differs more than 1%, a warning will be raised.



In [3]:

    
Clocks.fclk0_mhz = 27.123456
Clocks.fclk1_mhz = 31.436546
Clocks.fclk2_mhz = 14.597643
Clocks.fclk3_mhz = 0.251954

print(f'CPU:   {Clocks.cpu_mhz:.6f}MHz')
print(f'FCLK0: {Clocks.fclk0_mhz:.6f}MHz')
print(f'FCLK1: {Clocks.fclk1_mhz:.6f}MHz')
print(f'FCLK2: {Clocks.fclk2_mhz:.6f}MHz')
print(f'FCLK3: {Clocks.fclk3_mhz:.6f}MHz')









    



CPU:   650.000000MHz
FCLK0: 27.027027MHz
FCLK1: 31.250000MHz
FCLK2: 14.492754MHz
FCLK3: 0.251953MHz

Reset Clock Rates

Recover the original clock rates. This can be done by simply reloading the overlay (overlay will be downloaded automatically after instantiation).



In [4]:

    
_ = Overlay(PL.bitfile_name)

print(f'FCLK0: {Clocks.fclk0_mhz:.6f}MHz')
print(f'FCLK1: {Clocks.fclk1_mhz:.6f}MHz')
print(f'FCLK2: {Clocks.fclk2_mhz:.6f}MHz')
print(f'FCLK3: {Clocks.fclk3_mhz:.6f}MHz')









    



FCLK0: 100.000000MHz
FCLK1: 142.857143MHz
FCLK2: 200.000000MHz
FCLK3: 100.000000MHz