This notebook demonstrates how to download an FPGA overlay and examine programmable logic state.
With the following overlay bundle present in the overlays
folder, users can instantiate the overlay easily.
For example, an overlay called base
can be loaded by:
from pynq.overlays.base import BaseOverlay
overlay = BaseOverlay("base.bit")
Users can also use the absolute file path of the bitstream to instantiate the overlay.
In the following cell, we get the current bitstream loaded on PL, and try to download it multiple times.
In [1]:
from pynq import PL
from pynq import Overlay
ol = Overlay(PL.bitfile_name)
Now we can check the download timestamp for this overlay.
In [2]:
ol.download()
ol.timestamp
Out[2]:
In [3]:
PL.bitfile_name
Out[3]:
In [4]:
PL.timestamp
Out[4]:
Users can verify whether an overlay instance is currently loaded using the Overlay is_loaded() method
In [5]:
ol.is_loaded()
Out[5]:
In [6]:
import time
import matplotlib.pyplot as plt
length = 50
time_log = []
for i in range(length):
start = time.time()
ol.download()
end = time.time()
time_log.append((end-start)*1000)
%matplotlib inline
plt.plot(range(length), time_log, 'ro')
plt.title('Bitstream loading time (ms)')
plt.axis([0, length, 0, 1000])
plt.show()