This notebook demonstrates how to download an FPGA overlay and examine programmable logic state.
To instantiate an overlay, a bitstream file name is passed to the Overlay class.
The bitstream file does not need a full path if it resides in the pynq package, but a full path can be used for any bitstream located on the Linux file system. Two examples of overlay instantiation are shown below.
In [1]:
    
# Using base.bit located in pynq package
from pynq import Overlay
ol = Overlay("base.bit")
    
In the second case, users can use absolute file path to instantiate the overlay.
In [2]:
    
# Using the same bitstream, but with full path
from pynq import Overlay
ol = Overlay("/home/xilinx/pynq/bitstream/base.bit")
    
Now we can check the download timestamp for this overlay
In [3]:
    
ol.download()
ol.bitstream.timestamp
    
    Out[3]:
In [4]:
    
from pynq import PL
PL.bitfile_name
    
    Out[4]:
In [5]:
    
PL.timestamp
    
    Out[5]:
Users can verify whether an overlay instance is currently loaded using the Overlay is_loaded() method
In [6]:
    
ol.is_loaded()
    
    Out[6]:
In [7]:
    
import time
import matplotlib.pyplot as plt
from pynq import Overlay
ol1 = Overlay("base.bit")
length = 50
log1 = []
for i in range(length):
    start = time.time()
    ol1.download()
    end = time.time()
    # Record milliseconds
    log1.append((end-start)*1000)
# Draw the figure
%matplotlib inline
plt.plot(range(length), log1, 'ro')
plt.title('Bitstream loading time (ms)')
plt.axis([0, length, 0, 1000])
plt.show()
del ol1
    
    
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