2019-02-26 16:55:41,167 INFO : lisa.target.Target : Creating result directory: /data/work/lisa/results/Target-myhikey960-20190226_165522.134327/RTA-profiling_wload-20190226_165541.167219
2019-02-26 16:55:47,120 INFO : lisa.wlgen.rta.RTA : CPU0 calibration...
2019-02-26 16:55:47,451 INFO : lisa.wlgen.rta.RTA : Calibration value: CPU0
2019-02-26 16:55:47,453 INFO : lisa.wlgen.rta.RTA : Default policy: SCHED_OTHER
2019-02-26 16:55:47,454 INFO : lisa.wlgen.rta.RTA : ------------------------
2019-02-26 16:55:47,456 INFO : lisa.wlgen.rta.RTA : task [task1], sched: using default policy
2019-02-26 16:55:47,457 INFO : lisa.wlgen.rta.RTA : | start delay: 0.000000 [s]
2019-02-26 16:55:47,459 INFO : lisa.wlgen.rta.RTA : | loops count: 1
2019-02-26 16:55:47,461 INFO : lisa.wlgen.rta.RTA : + phase_000001
2019-02-26 16:55:47,462 INFO : lisa.wlgen.rta.Phase : | batch 0.001000 [s]
2019-02-26 16:55:47,707 INFO : lisa.wlgen.rta.RTA : Execution start: /root/devlib-target/bin/rt-app /root/devlib-target/rta_calib_cpu0.json 2>&1
2019-02-26 16:55:54,238 INFO : lisa.wlgen.rta.RTA : Execution complete
2019-02-26 16:55:54,495 INFO : lisa.wlgen.rta.RTA : CPU1 calibration...
2019-02-26 16:55:54,834 INFO : lisa.wlgen.rta.RTA : Calibration value: CPU1
2019-02-26 16:55:54,836 INFO : lisa.wlgen.rta.RTA : Default policy: SCHED_OTHER
2019-02-26 16:55:54,837 INFO : lisa.wlgen.rta.RTA : ------------------------
2019-02-26 16:55:54,839 INFO : lisa.wlgen.rta.RTA : task [task1], sched: using default policy
2019-02-26 16:55:54,840 INFO : lisa.wlgen.rta.RTA : | start delay: 0.000000 [s]
2019-02-26 16:55:54,841 INFO : lisa.wlgen.rta.RTA : | loops count: 1
2019-02-26 16:55:54,843 INFO : lisa.wlgen.rta.RTA : + phase_000001
2019-02-26 16:55:54,844 INFO : lisa.wlgen.rta.Phase : | batch 0.001000 [s]
2019-02-26 16:55:55,136 INFO : lisa.wlgen.rta.RTA : Execution start: /root/devlib-target/bin/rt-app /root/devlib-target/rta_calib_cpu1.json 2>&1
2019-02-26 16:56:01,658 INFO : lisa.wlgen.rta.RTA : Execution complete
2019-02-26 16:56:01,917 INFO : lisa.wlgen.rta.RTA : CPU2 calibration...
2019-02-26 16:56:02,250 INFO : lisa.wlgen.rta.RTA : Calibration value: CPU2
2019-02-26 16:56:02,252 INFO : lisa.wlgen.rta.RTA : Default policy: SCHED_OTHER
2019-02-26 16:56:02,253 INFO : lisa.wlgen.rta.RTA : ------------------------
2019-02-26 16:56:02,255 INFO : lisa.wlgen.rta.RTA : task [task1], sched: using default policy
2019-02-26 16:56:02,256 INFO : lisa.wlgen.rta.RTA : | start delay: 0.000000 [s]
2019-02-26 16:56:02,258 INFO : lisa.wlgen.rta.RTA : | loops count: 1
2019-02-26 16:56:02,260 INFO : lisa.wlgen.rta.RTA : + phase_000001
2019-02-26 16:56:02,262 INFO : lisa.wlgen.rta.Phase : | batch 0.001000 [s]
2019-02-26 16:56:02,506 INFO : lisa.wlgen.rta.RTA : Execution start: /root/devlib-target/bin/rt-app /root/devlib-target/rta_calib_cpu2.json 2>&1
2019-02-26 16:56:09,032 INFO : lisa.wlgen.rta.RTA : Execution complete
2019-02-26 16:56:09,320 INFO : lisa.wlgen.rta.RTA : CPU3 calibration...
2019-02-26 16:56:09,654 INFO : lisa.wlgen.rta.RTA : Calibration value: CPU3
2019-02-26 16:56:09,656 INFO : lisa.wlgen.rta.RTA : Default policy: SCHED_OTHER
2019-02-26 16:56:09,657 INFO : lisa.wlgen.rta.RTA : ------------------------
2019-02-26 16:56:09,659 INFO : lisa.wlgen.rta.RTA : task [task1], sched: using default policy
2019-02-26 16:56:09,660 INFO : lisa.wlgen.rta.RTA : | start delay: 0.000000 [s]
2019-02-26 16:56:09,661 INFO : lisa.wlgen.rta.RTA : | loops count: 1
2019-02-26 16:56:09,662 INFO : lisa.wlgen.rta.RTA : + phase_000001
2019-02-26 16:56:09,664 INFO : lisa.wlgen.rta.Phase : | batch 0.001000 [s]
2019-02-26 16:56:09,906 INFO : lisa.wlgen.rta.RTA : Execution start: /root/devlib-target/bin/rt-app /root/devlib-target/rta_calib_cpu3.json 2>&1
2019-02-26 16:56:16,435 INFO : lisa.wlgen.rta.RTA : Execution complete
2019-02-26 16:56:16,686 INFO : lisa.wlgen.rta.RTA : CPU4 calibration...
2019-02-26 16:56:17,020 INFO : lisa.wlgen.rta.RTA : Calibration value: CPU4
2019-02-26 16:56:17,021 INFO : lisa.wlgen.rta.RTA : Default policy: SCHED_OTHER
2019-02-26 16:56:17,023 INFO : lisa.wlgen.rta.RTA : ------------------------
2019-02-26 16:56:17,024 INFO : lisa.wlgen.rta.RTA : task [task1], sched: using default policy
2019-02-26 16:56:17,025 INFO : lisa.wlgen.rta.RTA : | start delay: 0.000000 [s]
2019-02-26 16:56:17,027 INFO : lisa.wlgen.rta.RTA : | loops count: 1
2019-02-26 16:56:17,028 INFO : lisa.wlgen.rta.RTA : + phase_000001
2019-02-26 16:56:17,029 INFO : lisa.wlgen.rta.Phase : | batch 0.001000 [s]
2019-02-26 16:56:17,274 INFO : lisa.wlgen.rta.RTA : Execution start: /root/devlib-target/bin/rt-app /root/devlib-target/rta_calib_cpu4.json 2>&1
2019-02-26 16:56:22,613 INFO : lisa.wlgen.rta.RTA : Execution complete
2019-02-26 16:56:22,863 INFO : lisa.wlgen.rta.RTA : CPU5 calibration...
2019-02-26 16:56:23,197 INFO : lisa.wlgen.rta.RTA : Calibration value: CPU5
2019-02-26 16:56:23,199 INFO : lisa.wlgen.rta.RTA : Default policy: SCHED_OTHER
2019-02-26 16:56:23,200 INFO : lisa.wlgen.rta.RTA : ------------------------
2019-02-26 16:56:23,201 INFO : lisa.wlgen.rta.RTA : task [task1], sched: using default policy
2019-02-26 16:56:23,202 INFO : lisa.wlgen.rta.RTA : | start delay: 0.000000 [s]
2019-02-26 16:56:23,204 INFO : lisa.wlgen.rta.RTA : | loops count: 1
2019-02-26 16:56:23,206 INFO : lisa.wlgen.rta.RTA : + phase_000001
2019-02-26 16:56:23,207 INFO : lisa.wlgen.rta.Phase : | batch 0.001000 [s]
2019-02-26 16:56:23,458 INFO : lisa.wlgen.rta.RTA : Execution start: /root/devlib-target/bin/rt-app /root/devlib-target/rta_calib_cpu5.json 2>&1
2019-02-26 16:56:27,768 INFO : lisa.wlgen.rta.RTA : Execution complete
2019-02-26 16:56:28,020 INFO : lisa.wlgen.rta.RTA : CPU6 calibration...
2019-02-26 16:56:28,356 INFO : lisa.wlgen.rta.RTA : Calibration value: CPU6
2019-02-26 16:56:28,357 INFO : lisa.wlgen.rta.RTA : Default policy: SCHED_OTHER
2019-02-26 16:56:28,359 INFO : lisa.wlgen.rta.RTA : ------------------------
2019-02-26 16:56:28,360 INFO : lisa.wlgen.rta.RTA : task [task1], sched: using default policy
2019-02-26 16:56:28,361 INFO : lisa.wlgen.rta.RTA : | start delay: 0.000000 [s]
2019-02-26 16:56:28,363 INFO : lisa.wlgen.rta.RTA : | loops count: 1
2019-02-26 16:56:28,364 INFO : lisa.wlgen.rta.RTA : + phase_000001
2019-02-26 16:56:28,366 INFO : lisa.wlgen.rta.Phase : | batch 0.001000 [s]
2019-02-26 16:56:28,609 INFO : lisa.wlgen.rta.RTA : Execution start: /root/devlib-target/bin/rt-app /root/devlib-target/rta_calib_cpu6.json 2>&1
2019-02-26 16:56:33,947 INFO : lisa.wlgen.rta.RTA : Execution complete
2019-02-26 16:56:34,239 INFO : lisa.wlgen.rta.RTA : CPU7 calibration...
2019-02-26 16:56:34,571 INFO : lisa.wlgen.rta.RTA : Calibration value: CPU7
2019-02-26 16:56:34,573 INFO : lisa.wlgen.rta.RTA : Default policy: SCHED_OTHER
2019-02-26 16:56:34,575 INFO : lisa.wlgen.rta.RTA : ------------------------
2019-02-26 16:56:34,576 INFO : lisa.wlgen.rta.RTA : task [task1], sched: using default policy
2019-02-26 16:56:34,577 INFO : lisa.wlgen.rta.RTA : | start delay: 0.000000 [s]
2019-02-26 16:56:34,579 INFO : lisa.wlgen.rta.RTA : | loops count: 1
2019-02-26 16:56:34,580 INFO : lisa.wlgen.rta.RTA : + phase_000001
2019-02-26 16:56:34,581 INFO : lisa.wlgen.rta.Phase : | batch 0.001000 [s]
2019-02-26 16:56:34,823 INFO : lisa.wlgen.rta.RTA : Execution start: /root/devlib-target/bin/rt-app /root/devlib-target/rta_calib_cpu7.json 2>&1
2019-02-26 16:56:40,162 INFO : lisa.wlgen.rta.RTA : Execution complete
2019-02-26 16:56:40,407 INFO : lisa.wlgen.rta.RTA : Target RT-App calibration: {0: 302, 1: 302, 2: 302, 3: 302, 4: 155, 5: 155, 6: 155, 7: 155}
2019-02-26 16:56:41,962 INFO : lisa.wlgen.rta.RTA : Calibration value: 155
2019-02-26 16:56:41,963 INFO : lisa.wlgen.rta.RTA : Default policy: SCHED_OTHER
2019-02-26 16:56:41,964 INFO : lisa.wlgen.rta.RTA : ------------------------
2019-02-26 16:56:41,965 INFO : lisa.wlgen.rta.RTA : task [task2], sched: using default policy
2019-02-26 16:56:41,966 INFO : lisa.wlgen.rta.RTA : | start delay: 0.000000 [s]
2019-02-26 16:56:41,967 INFO : lisa.wlgen.rta.RTA : | loops count: 1
2019-02-26 16:56:41,968 INFO : lisa.wlgen.rta.RTA : + phase_000001
2019-02-26 16:56:41,969 INFO : lisa.wlgen.rta.Phase : | duration 1.000000 [s] (10 loops)
2019-02-26 16:56:41,970 INFO : lisa.wlgen.rta.Phase : | period 100000 [us], duty_cycle 20 %
2019-02-26 16:56:41,971 INFO : lisa.wlgen.rta.Phase : | run_time 20000 [us], sleep_time 80000 [us]
2019-02-26 16:56:41,972 INFO : lisa.wlgen.rta.RTA : ------------------------
2019-02-26 16:56:41,974 INFO : lisa.wlgen.rta.RTA : task [task7], sched: using default policy
2019-02-26 16:56:41,979 INFO : lisa.wlgen.rta.RTA : | start delay: 0.000000 [s]
2019-02-26 16:56:41,979 INFO : lisa.wlgen.rta.RTA : | loops count: 1
2019-02-26 16:56:41,981 INFO : lisa.wlgen.rta.RTA : + phase_000001
2019-02-26 16:56:41,982 INFO : lisa.wlgen.rta.Phase : | duration 1.000000 [s] (10 loops)
2019-02-26 16:56:41,983 INFO : lisa.wlgen.rta.Phase : | period 100000 [us], duty_cycle 20 %
2019-02-26 16:56:41,984 INFO : lisa.wlgen.rta.Phase : | run_time 20000 [us], sleep_time 80000 [us]
2019-02-26 16:56:41,985 INFO : lisa.wlgen.rta.RTA : ------------------------
2019-02-26 16:56:41,987 INFO : lisa.wlgen.rta.RTA : task [task5], sched: using default policy
2019-02-26 16:56:41,988 INFO : lisa.wlgen.rta.RTA : | start delay: 0.000000 [s]
2019-02-26 16:56:41,989 INFO : lisa.wlgen.rta.RTA : | loops count: 1
2019-02-26 16:56:41,990 INFO : lisa.wlgen.rta.RTA : + phase_000001
2019-02-26 16:56:41,990 INFO : lisa.wlgen.rta.Phase : | duration 1.000000 [s] (10 loops)
2019-02-26 16:56:41,991 INFO : lisa.wlgen.rta.Phase : | period 100000 [us], duty_cycle 20 %
2019-02-26 16:56:41,992 INFO : lisa.wlgen.rta.Phase : | run_time 20000 [us], sleep_time 80000 [us]
2019-02-26 16:56:41,993 INFO : lisa.wlgen.rta.RTA : ------------------------
2019-02-26 16:56:41,994 INFO : lisa.wlgen.rta.RTA : task [task3], sched: using default policy
2019-02-26 16:56:41,994 INFO : lisa.wlgen.rta.RTA : | start delay: 0.000000 [s]
2019-02-26 16:56:41,995 INFO : lisa.wlgen.rta.RTA : | loops count: 1
2019-02-26 16:56:41,996 INFO : lisa.wlgen.rta.RTA : + phase_000001
2019-02-26 16:56:41,996 INFO : lisa.wlgen.rta.Phase : | duration 1.000000 [s] (10 loops)
2019-02-26 16:56:42,002 INFO : lisa.wlgen.rta.Phase : | period 100000 [us], duty_cycle 20 %
2019-02-26 16:56:42,003 INFO : lisa.wlgen.rta.Phase : | run_time 20000 [us], sleep_time 80000 [us]
2019-02-26 16:56:42,004 INFO : lisa.wlgen.rta.RTA : ------------------------
2019-02-26 16:56:42,004 INFO : lisa.wlgen.rta.RTA : task [task6], sched: using default policy
2019-02-26 16:56:42,005 INFO : lisa.wlgen.rta.RTA : | start delay: 0.000000 [s]
2019-02-26 16:56:42,007 INFO : lisa.wlgen.rta.RTA : | loops count: 1
2019-02-26 16:56:42,008 INFO : lisa.wlgen.rta.RTA : + phase_000001
2019-02-26 16:56:42,009 INFO : lisa.wlgen.rta.Phase : | duration 1.000000 [s] (10 loops)
2019-02-26 16:56:42,010 INFO : lisa.wlgen.rta.Phase : | period 100000 [us], duty_cycle 20 %
2019-02-26 16:56:42,011 INFO : lisa.wlgen.rta.Phase : | run_time 20000 [us], sleep_time 80000 [us]
2019-02-26 16:56:42,012 INFO : lisa.wlgen.rta.RTA : ------------------------
2019-02-26 16:56:42,012 INFO : lisa.wlgen.rta.RTA : task [task0], sched: using default policy
2019-02-26 16:56:42,014 INFO : lisa.wlgen.rta.RTA : | start delay: 0.000000 [s]
2019-02-26 16:56:42,015 INFO : lisa.wlgen.rta.RTA : | loops count: 1
2019-02-26 16:56:42,016 INFO : lisa.wlgen.rta.RTA : + phase_000001
2019-02-26 16:56:42,017 INFO : lisa.wlgen.rta.Phase : | duration 1.000000 [s] (10 loops)
2019-02-26 16:56:42,019 INFO : lisa.wlgen.rta.Phase : | period 100000 [us], duty_cycle 20 %
2019-02-26 16:56:42,020 INFO : lisa.wlgen.rta.Phase : | run_time 20000 [us], sleep_time 80000 [us]
2019-02-26 16:56:42,021 INFO : lisa.wlgen.rta.RTA : ------------------------
2019-02-26 16:56:42,022 INFO : lisa.wlgen.rta.RTA : task [task1], sched: using default policy
2019-02-26 16:56:42,023 INFO : lisa.wlgen.rta.RTA : | start delay: 0.000000 [s]
2019-02-26 16:56:42,025 INFO : lisa.wlgen.rta.RTA : | loops count: 1
2019-02-26 16:56:42,025 INFO : lisa.wlgen.rta.RTA : + phase_000001
2019-02-26 16:56:42,026 INFO : lisa.wlgen.rta.Phase : | duration 1.000000 [s] (10 loops)
2019-02-26 16:56:42,027 INFO : lisa.wlgen.rta.Phase : | period 100000 [us], duty_cycle 20 %
2019-02-26 16:56:42,027 INFO : lisa.wlgen.rta.Phase : | run_time 20000 [us], sleep_time 80000 [us]
2019-02-26 16:56:42,028 INFO : lisa.wlgen.rta.RTA : ------------------------
2019-02-26 16:56:42,029 INFO : lisa.wlgen.rta.RTA : task [task4], sched: using default policy
2019-02-26 16:56:42,030 INFO : lisa.wlgen.rta.RTA : | start delay: 0.000000 [s]
2019-02-26 16:56:42,031 INFO : lisa.wlgen.rta.RTA : | loops count: 1
2019-02-26 16:56:42,032 INFO : lisa.wlgen.rta.RTA : + phase_000001
2019-02-26 16:56:42,033 INFO : lisa.wlgen.rta.Phase : | duration 1.000000 [s] (10 loops)
2019-02-26 16:56:42,035 INFO : lisa.wlgen.rta.Phase : | period 100000 [us], duty_cycle 20 %
2019-02-26 16:56:42,036 INFO : lisa.wlgen.rta.Phase : | run_time 20000 [us], sleep_time 80000 [us]